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| Line 51: |
Line 51: |
| ==Diagram, Layout and Dimension== | | ==Diagram, Layout and Dimension== |
| ===Pin Descriptions=== | | ===Pin Descriptions=== |
| *'''26Pin UART/SPI/I2C/PWM Interface'''
| |
| ::{| class="wikitable"
| |
| |-
| |
| |Pin# || Name ||Pin# || Name
| |
| |-
| |
| |1 || VDD_3.3V ||2 || VDD_5V
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| |-
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| |3 ||I2C0_SDA ||4 || VDD_5V
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| |-
| |
| |5 || I2C0_SCL ||6 || DGND
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| |-
| |
| |7 || NC ||8 || UART3_TX
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| |-
| |
| |9 || DGND ||10 || UART3_RX
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| |-
| |
| |11 || NC ||12 || GPIOD1/PWM0
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| |-
| |
| |13 || NC ||14 || DGND
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| |-
| |
| |15 || NC ||16 || GPIOC13/PWM1
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| |-
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| |17 || VDD_3.3V ||18 ||NC
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| |-
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| |19 || SPI0_MOSI/GPIOC31 ||20 || DGND
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| |-
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| |21 || SPI0_MISO/GPIOD0 || 22 || NC
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| |-
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| |23 || SPI0_CLK/GPIOC29 || 24 || SPI0_CS/GPIOC30
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| |-
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| |25 || DGND || 26 || NC
| |
| |}
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|
| |
|
| *'''LVDS Interface'''
| |
| ::{| class="wikitable"
| |
| |-
| |
| |Pin# || Name ||Pin# || Name
| |
| |-
| |
| |1 || SYS_3.3V ||2 || SYS_3.3V
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| |-
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| |3 ||GPIOC16 ||4 || GPIOB18
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| |-
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| |5 || DGND ||6 || DGND
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| |-
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| |7 || LVDS_D0- ||8 || LVDS_D0+
| |
| |-
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| |9 || LVDS_D1- ||10 || LVDS_D1+
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| |-
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| |11 || LVDS_D2- ||12 || LVDS_D2+
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| |-
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| |13 || DGND ||14 || DGND
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| |-
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| |15 || LVDS_CLK- ||16 || LVDS_CLK+
| |
| |-
| |
| |17 || LVDS_D3- ||18 || LVDS_D3+
| |
| |-
| |
| |19 ||I2C2_SCL ||20 || I2C2_SDA
| |
| |}
| |
|
| |
| *'''DVP Camera Interface'''
| |
| ::{| class="wikitable"
| |
| |-
| |
| |Pin# || Name
| |
| |-
| |
| |1, 2 || SYS_3.3V
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| |-
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| |7,9,13,15,24 || DGND
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| |-
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| |3 || I2C0_SCL
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| |-
| |
| |4 || I2C0_SDA
| |
| |-
| |
| |5 || GPIOB14
| |
| |-
| |
| |6 || GPIOB16
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| |-
| |
| |8,10 || NC
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| |-
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| |11 || VSYNC
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| |-
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| |12 || HREF
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| |-
| |
| |14 || PCLK
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| |-
| |
| |16-23 || Data bit7-0
| |
| |}
| |
|
| |
| *'''LCD Interface'''
| |
| ::{| class="wikitable"
| |
| |-
| |
| |Pin# || Name || Description
| |
| |-
| |
| |1, 2 || VDD_5V || 5V Output, it can be used to power LCD modules
| |
| |-
| |
| |11，20，29, 37，38，39，40, 45|| DGND || Ground
| |
| |-
| |
| |3-10 || Blue LSB to MSB || RGB blue
| |
| |-
| |
| |12-19 || Green LSB to MSB || RGB green
| |
| |-
| |
| |21-28 || Red LSB to MSB || RGB red
| |
| |-
| |
| |30 || GPIOB25 || available for users
| |
| |-
| |
| |31 || GPIOC15 || occupied by FriendlyARM one wire technology to recognize LCD models <br>
| |
| and control backlight and implement resistive touch, not applicable for users
| |
| |-
| |
| |32 || XnRSTOUT Form CPU || low when system is reset
| |
| |-
| |
| |33 || VDEN || signal the external LCD that data is valid on the data bus
| |
| |-
| |
| |34 || VSYNC || vertical synchronization
| |
| |-
| |
| |35 || HSYNC || horizontal synchronization
| |
| |-
| |
| |36 || LCDCLK || LCD clock, Pixel frequency
| |
| |-
| |
| |41 || I2C2_SCL || I2C2 clock signal, for capacitive touch data transmission
| |
| |-
| |
| |42 || I2C2_SDA || I2C2 data signal, for capacitive touch data transmission
| |
| |-
| |
| |43 || GPIOC16 || interrupt pin for capacitive touch, used with I2C2
| |
| |-
| |
| |44 || NC || Not connected
| |
| |}
| |
|
| |
| *'''SATA Interface'''
| |
| ::* Standard 7Pin Data Interface, 4Pin Power Interface
| |
| ::[[File:SATA-01.png|frameless|500px|]]
| |
|
| |
|
| |
| *'''Power Interface'''
| |
| ::*DC power jack, applicable for DC 5.5 * 2.1mm power jack, DC 9V~24V/2A. When you connect a SATA hard disk or LVDS LCD to it a 12V/3A power adapter is required
| |
| ::[[File:DC-005.png|frameless|200px|]]
| |
|
| |
| ::*2.54mm pitch, 2510-4P pin-header, Pin1~Pin4 description: VDD_12V, DGND, DGND, 12V_IN<br>Pin 12V_IN is connected to DC power jack, VDD_12V is connected to 12V_IN through the S1 switch
| |
| ::[[File:CON5.png]]
| |
|
| |
|
| ===Dimensional Diagram=== | | ===Dimensional Diagram=== |
| [[File:Smart4418SDK-1606-Dimensions.png|frameless|800px|Smart4418SDK-1606-Dimensions]]
| |
|
| |
|
| ::For more details refer to :[http://wiki.friendlyarm.com/wiki/images/9/90/Smart4418-1606-Dimensions%28dxf%29.zip dxf file]
| |
|
| |
|
| ==Resources== | | ==Resources== |
| :SDK Carrier Board Hardware Technical Documents
| |
| ::[http://wiki.friendlyarm.com/wiki/images/c/c0/Smart4418SDK-1606-PCB%28brd%29.zip PCB source files], Allegro 16.5 or above<br>
| |
| ::[http://wiki.friendlyarm.com/wiki/images/9/90/Smart4418-1606-Dimensions%28dxf%29.zip PCB dxf file]<br>
| |
| ::[http://wiki.friendlyarm.com/wiki/images/1/1c/Smart4418SDK-1606-Schematic%28dsn%29.zip schematics], OrCAD 16.5 or above<br>
| |
| ::[http://wiki.friendlyarm.com/wiki/images/9/90/Smart4418SDK-1606-Schematic.pdf schematics in pdf]
| |
| :[http://wiki.friendlyarm.com/wiki/index.php/Smart4418 Smart4418 CPU board wiki]<br>
| |
| :[http://wiki.friendlyarm.com/wiki/images/0/0b/Smart4418-1512-Schematic.pdf Smart4418 CPU board schematics in pdf]
| |
|
| |
| ==Update Log==
| |
| ===August-02-2016===
| |
| * Released English version
| |
|
| |
| ===Dec-08-2016===
| |
| * Updated Section 2
| |
